The current loop mathematical model was at first analyzed, then the closedloop transfer function of the current loop was derived, it was pointed out that bandwidth was inversely proportional to system delay times. The traditional PMSM current loop delay times based on digital signal processor (DSC) was relatively large, the greater the speed change, the more obvious the impact of bandwidth, while PMSM current loop delay times based on fieldprogrammable gate array (FPGA) could be reduced one times, which improved the response of the speed loop, and experimental results verified the theoretical analysis.